Analyzing the Tny268pn Circuit Layout and Component Connections

Begin by identifying the primary switching element on the board–typically an integrated circuit with a high-voltage MOSFET, such as those in the TNY series. Pin 5 (DRAIN) should connect directly to the transformer’s primary winding, while Pin 4 (BYPASS) must have a 0.1µF capacitor to ground for stable internal bias. Omitting this capacitor leads to erratic switching behavior and potential overvoltage conditions on the secondary side.

Ensure the transformer’s primary inductance falls within 200-500µH for input voltages between 85-265VAC. Values outside this range cause excessive peak currents (check with an oscilloscope on the DRAIN pin; spikes should not exceed 700mA). The snubber circuit (typically a diode, resistor, and capacitor in series across the primary winding) must clamp voltage transients below 650V to prevent avalanche breakdown of the MOSFET.

On the secondary side, the output diode’s reverse recovery time should be under 50ns for 5V outputs and 30ns for 12V or higher. Schottky diodes (e.g., STPS30L45C) are optimal, but ultrafast recovery types (e.g., MUR160) may suffice if layout constraints limit heat dissipation. The output capacitor’s ESR must be below 50mΩ to meet load transient requirements; polymer capacitors outperform electrolytic types in this role.

Feedback resistors on the EN/UV pin (usually Pins 1-3) must divide the output voltage to 135mV ±5mV for regulation. Use 1% tolerance resistors to maintain ±2% output accuracy. Overcurrent protection activates when the current sense resistor (typically 2-4Ω) drops ~60mV; calibrate this value based on the maximum load current to avoid false triggering under dynamic conditions.

Critical layout practices: Keep the DRAIN node’s copper area minimal to reduce parasitic capacitance. Route the BYPASS capacitor trace as a direct, unbroken line to the source (ground) pin to prevent noise coupling. Separate analog ground (feedback network) from power ground (output capacitor) with a single-point star connection to avoid ground loops.

Complete Reference for TNY268-Based Power Circuit Design

Place the feedback network directly between the secondary winding and the control IC’s feedback pin. Use a 10kΩ resistor in series with a 2N3904 transistor base, paired with a 2.2μF capacitor across the emitter and ground. This configuration stabilizes output regulation at ±3% under 10-100% load variations without requiring external compensation components.

Select input capacitors based on peak current demands: for a 12V output at 2A, install a 47μF X7R ceramic capacitor rated for 50V–this handles transient spikes during startup. Parallel it with a 100nF film capacitor to shunt high-frequency noise above 1MHz. Avoid electrolytics here; their ESR introduces voltage droop under rapid load steps.

Implement snubber circuits on both primary and secondary sides. On the primary, connect a 2.2nF/250V capacitor in series with a 10Ω/2W resistor across the transformer’s primary winding. For the secondary diode, use a 1nF/100V capacitor with a 47Ω resistor in parallel to clamp recovery voltage spikes to under 50V, extending diode lifespan by 40%.

Ground all noise-sensitive traces to a single star point–route the IC’s source pin and input capacitor return via separate 1mm-wide traces to this point. Keep the feedback trace less than 20mm in length and spaced 2mm from switching nodes to prevent coupling. For multilayer boards, dedicate the inner layer as a continuous ground plane; stitch it to the outer layer at 5mm intervals.

Optimize transformer core selection using these parameters: for 10W output at 100kHz, use an EF16 core with an AL value of 1500nH/N². Wind the primary with 48 turns of 0.25mm wire, the secondary with 12 turns of 0.5mm bifilar wire. Maintain 1mm creepage distance between windings to meet 2kV isolation requirements; use triple-insulated wire for medical-grade applications.

Test for efficiency at 25°C ambient: measure input power with a 0.1% accuracy wattmeter while varying load from 1-10W. The circuit should achieve >85% efficiency above 5W load if snubber components are correctly sized. If efficiency dips below 80%, replace the secondary diode with a Schottky type rated for 1.5x the average forward current to reduce conduction losses.

Key Components and Their Roles in the Flyback Controller Layout

Prioritize a fast-recovery diode (e.g., UF4007) on the output rectifier path to minimize reverse recovery losses–critical for efficiency above 85% in 12V/2A designs. Pair it with a 100μF/25V low-ESR capacitor (Nichicon UHE or Panasonic FM series) to suppress voltage spikes exceeding 120% of the nominal output under transient loads. The BYPASS pin (BP) demands a 0.1μF X7R ceramic capacitor (Murata GRM18) placed within 2mm of the pin to prevent turn-on delays, with traces widened to 20mil for reduced inductance.

• Primary-side MOSFET: Use a 700V/0.8Ω device (STP7NK70Z) with ≤50ns turn-off delay; thermal vias under the pad must connect to a 2oz copper pour (20×20mm) to handle 3W dissipation at 35°C ambient.
• Feedback network: An optocoupler (PC817) with CTR ≥100% and a TL431 configured for 2.5V reference ensures ±2% output regulation. Exclude >10kΩ resistors in the divider to avoid noise coupling; use 1% tolerance metal-film types.
• Snubber circuit: A 2.2nF/1.5kV polypropylene capacitor (WIMA MKS2) in series with a 47Ω/1W metal-oxide resistor (Xicon) clamps drain voltage to ≤650V, preventing avalanche breakdown.

Step-by-Step Assembly of the TNY-Series Flyback Converter

Begin by verifying all components against the reference layout. The isolated power circuit requires a 4.7μF input capacitor rated for 400V, a 0.33μF bootstrap capacitor, and a 1N4937 fast recovery diode for clamp protection. Missing or incorrect values will cause instability or failure. Place the high-voltage MOSFET near the feedback winding to minimize noise coupling.

Solder the EMI suppression components first. The input pi-filter should use a 10Ω resistor in series with a 2.2nF X-capacitor to ground. This reduces conducted interference before it reaches the primary winding. Use a 100μH common-mode choke after the bridge rectifier–omit this if the application prioritizes cost over compliance. Ensure solder joints on the choke are smooth to prevent parasitic oscillations at startup.

Critical Feedback Configuration

Connect the optocoupler’s collector to the EN/UV pin via a 20kΩ pull-up resistor. The emitter should tie directly to the secondary ground plane. Use a 1kΩ series resistor on the optocoupler’s LED side to limit current–the wrong value here will either delay regulation or burn out the LED. The feedback node must be kept under 1mm from the controller to avoid phase lag in load transients.

Wind the flyback transformer with 22AWG magnet wire. The primary requires 45 turns bifilar-wound for reduced leakage inductance; the secondary needs 6 turns with triple-insulated wire. Sandwich the windings between layers of 75μm polyester tape to meet 3kV isolation. Test inductance with an LCR meter–expect 1.2mH ±5% for proper energy transfer. Deviations risk saturation or insufficient output power.

Final Checks Before Power-Up

Install a 100pF snubber capacitor across the MOSFET’s drain-source terminals to suppress voltage spikes. Omit this only if the transformer’s leakage inductance is under 2μH. Populate the output rectifier with a Schottky diode rated for 60V/2A–standard silicon diodes introduce 0.7V forward drop losses. Confirm all grounds are star-connected at the input capacitor’s negative terminal to prevent ground loops in sensitive analog circuits.

Power the board with an adjustable lab supply at 90VAC. Monitor the output with an oscilloscope–ripple should remain below 120mVpp. If overshoot exceeds 10%, increase the soft-start capacitor from 1nF to 2.2nF. For thermal management, mount the controller on a 20mm² copper pad; exceeding 100°C junction temperature reduces lifespan by 50% per 10°C increment.

Key Errors in Power Circuit Blueprints Featuring Flyback Topologies

Neglecting the feedback network configuration causes unstable output voltages. The error amplifier in the controller relies on precise resistor dividends–mistakes in calculating R_FB1 and R_FB2 (typically a 3.3:1 ratio for 12V outputs) lead to either overvoltages exceeding 5% or oscillations. Always verify the divider equation: VOUT = 1.0V * (1 + RFB1/RFB2). Common pitfalls include using 1% tolerance resistors when 0.1% are mandatory, or omitting the 1nF bypass capacitor on the feedback pin, which filters noise from switching transients.

• Incorrect transformer winding polarity: Reversing the dot notation on the primary or auxiliary windings disrupts energy transfer. Symptoms include excessive drain voltage spikes (above 600V) or audible coil whine. Confirm polarity with an LCR meter before soldering, and mark windings on the PCB silkscreen.
• Missing snubber circuits: Skipping the RCD clamp (e.g., 47kΩ + 10nF + 1N4148) on the primary side allows voltage spikes to exceed the MOSFET’s 700V breakdown limit. Size the snubber resistor using R = (VIN(MAX) + VOUT * N)² / (PLEAKAGE), where N is the turns ratio.
• Undersized input capacitors: Using 47µF/400V bulk caps instead of 100µF/400V for 120W designs causes ripple currents to exceed 10% of the rated value. Calculate required capacitance as C = IOUT(MAX) * D / (fSW * ΔVIN), where D is the duty cycle (~0.45) and fSW is the switching frequency (132kHz).

Overlooking thermal derating leads to premature shutdowns. The controller’s SO-8 package dissipates 1.5W at 25°C but requires derating above 50°C (linear reduction to 0.5W at 125°C). Route 2oz copper traces (minimum 3mm width) under the package and use vias to a ground plane. Failure to include a 10kΩ pull-down on the enable pin causes erratic startups–add this resistor even if the pin is tied to V_IN. Finally, bypass the V_CC pin with a 1µF ceramic capacitor, not electrolytic, to handle high-frequency current demands.